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Vol. 1

International Journal of Embedded Systems

2005 Vol. 1 No. 1/2

Special Issue on Hardware-Software Codesign For Systems-On-Chip

Guest Editor: Dr. Pao-Ann Hsiung

 

Preface
PagesTitle and authors
2-13Integrated functional partitioning and synthesis for low power distributed systems of systems-on-a-chip
Yunsi Fei, Niraj K. Jha
DOI: 10.1504/IJES.2005.008804

14-22A methodology for validation of microprocessors using symbolic simulation
Prabhat Mishra, Nikil Dutt, Narayanan Krishnamurthy, Magdy Abadir
DOI: 10.1504/IJES.2005.008805

23-32A platform based SOC design methodology and its application in image compression
Kai-Yuan Jan, Chih-Bin Fan, An-Chao Kuo, Wen-Chi Yen, Youn-Long Lin
DOI: 10.1504/IJES.2005.008806

33-49Performance analysis for complex embedded applications
Marek Jersak, Kai Richter, Rolf Ernst
DOI: 10.1504/IJES.2005.008807

50-64Adaptive smart antennae receiver controlled by a hardware-based genetic optimiser
Gabriella Kokai, Hans Holm Fruhauf, Feng Xu
DOI: 10.1504/IJES.2005.008808

65-77CoreMap: a rapid prototyping environment for distributed reconfigurable systems
Christophe Bobda
DOI: 10.1504/IJES.2005.008809

78-90A system-level framework for designing and evaluating protocol processor architectures
Seppo Virtanen, Tero Nurmi, Jani Paakkulainen, Johan Lilius
DOI: 10.1504/IJES.2005.008810

91-102Energy-efficient hardware/software co-synthesis for a class of applications on reconfigurable SoCs
Jingzhao Ou, Seonil B. Choi, Viktor K. Prasanna
DOI: 10.1504/IJES.2005.008811

103-111ChronoSym: a new approach for fast and accurate SoC cosimulation
Iuliana Bacivarov, Aimen Bouchhima, Sungjoo Yoo, Ahmed A. Jerraya
DOI: 10.1504/IJES.2005.008812

112-124Hardware/software codesign of on-chip communication architecture for application-specific multiprocessor system-on-chip
Nacer-Eddine Zergainoh, Amer Baghdadi, Ahmed Jerraya
DOI: 10.1504/IJES.2005.008813

125-133A hardware/software co-design case study on MPEG AAC audio decoder
Tsung-Han Tsai, Chun-Nan Liu
DOI: 10.1504/IJES.2005.008814

134-149TLSim and EVC: a term-level symbolic simulator and an efficient decision procedure for the logic of equality with uninterpreted functions and memories
Miroslav N. Velev, Randal E. Bryant
DOI: 10.1504/IJES.2005.008815