International Journal of High Performance Systems Architecture (IJHPSA) Inderscience Publishers - linking academia, business and industry through research

International Journal of High Performance Systems Architecture

Special Issue on Reconfigurable and Scalable High Performance Architectures

Guest Editor: Nader Bagherzadeh

Pages	Title and author(s)
79-88	A flexible processor for the characteristic 3 η_T pairing Robert Ronan, Colin Murphy, Tim Kerins, Colm O.hEigeartaigh, Paulo S.L.M. Barreto DOI: 10.1504/IJHPSA.2007.015393
89-97	Reconfiguration support for vector operations Hongyan Yang, Sotirios G. Ziavras, Jie Hu DOI: 10.1504/IJHPSA.2007.015394
98-105	Design of a router for network-on-chip Jun Ho Bahn, Seung Eun Lee, Nader Bagherzadeh DOI: 10.1504/IJHPSA.2007.015395
106-112	Efficient finite field processor for GF(2¹⁶³) and its implementation Bijan Ansari, Huapeng Wu DOI: 10.1504/IJHPSA.2007.015396
113-123	An efficient fault tolerant mechanism to deal with permanent and transient failures in a network on chip Muhammad Ali, Michael Welzl, Sven Hessler, Sybille Hellebrand DOI: 10.1504/IJHPSA.2007.015397
124-132	Compact FPGA-based systolic array architecture suitable for vision systems Griselda Saldana, Miguel Arias-Estrada DOI: 10.1504/IJHPSA.2007.015398
133-142	SPA resistant elliptic curve cryptosystem using addition chains Andrew Byrne, Francis Crowe, William Peter Marnane, Nicolas Meloni, Arnaud Tisserand, Emanuel M. Popovici DOI: 10.1504/IJHPSA.2007.015399