
International Journal of Circuits and Architecture Design
2016 Vol.2 No.3/4
Pages | Title and author(s) |
183-200 | Performance improvement in tree multiplier using full swing GDI logic based CLA adderShoba Mohan; Nakkeeran Rangaswamy DOI: 10.1504/IJCAD.2016.089640 |
201-232 | An efficient realisation of FIFO buffers for NoC routers using technology dependent optimisations targeting LUT based FPGAsLiyaqat Nazir; Roohie Naaz Mir DOI: 10.1504/IJCAD.2016.089643 |
233-245 | Design of low power VCO based on single ended delay cellsDileep Dwivedi; Manoj Kumar DOI: 10.1504/IJCAD.2016.089647 |
246-257 | Adder circuit design using quantum-dot cellular automataSahar Ghanbary; Mehrdad Maeen; Majid Haghparast DOI: 10.1504/IJCAD.2016.089672 |
258-271 | Real-time implementation of various colour space modelsSaravanan Govindasamy; Yamuna Govindarajan DOI: 10.1504/IJCAD.2016.089654 |