
International Journal of Circuits and Architecture Design
2016 Vol.2 No.1
Pages | Title and author(s) |
1-12 | Dynamically reconfigurable evolutionary multi-context robust cellular array designSobhan Soleymani; Afzel Noore DOI: 10.1504/IJCAD.2016.075889 |
13-29 | Power-area trade-off in power gated FSM synthesisPriyanka Choudhury; Sambhu Nath Pradhan DOI: 10.1504/IJCAD.2016.075891 |
30-49 | Automated physical verification of I/O pads using scaling factorsRajesh Mangalore Anand; Soujanya Ravula; Kalpashree Anand DOI: 10.1504/IJCAD.2016.075895 |
50-67 | Curvature-correction in the bandgap voltage reference based on thermal compensation of beta and base-emitter voltageVinayak Hande; Maryam Shojaei Baghini DOI: 10.1504/IJCAD.2016.075900 |
68-82 | CMOS oscillator with MOS varactor and body bias tuningManoj Kumar DOI: 10.1504/IJCAD.2016.075912 |
83-103 | Approach to design a high performance fault-tolerant reversible ALUNeeraj Kumar Misra; Subodh Wairya; Vinod Kumar Singh DOI: 10.1504/IJCAD.2016.075913 |