International Journal of High Performance Systems Architecture
2017 Vol.7 No.1
Pages | Title and author(s) |
1-14 | CHILL: a system for fine-grained mapping of chained high impact long-latency load phases on tightly coupled heterogeneous multi-coresRobert Chen; Glenn Reinman DOI: 10.1504/IJHPSA.2017.083641 |
15-25 | A novel high-performance and reliable multi-threshold CNFET full adder cell designYavar Safaei Mehrabani; Mohammad Hossein Shafiabadi DOI: 10.1504/IJHPSA.2017.083644 |
26-40 | Hardware design of parallel switch setting algorithm for Benes networksYikun Jiang; Mei Yang DOI: 10.1504/IJHPSA.2017.083645 |
41-55 | Multi-architecture profiler for AndroidAnderson Luiz Sartor; Antonio Carlos Schneider Beck DOI: 10.1504/IJHPSA.2017.083648 |