Forthcoming articles

International Journal of Nanoparticles

International Journal of Nanoparticles (IJNP)

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International Journal of Nanoparticles (18 papers in press)

Regular Issues

  • Preparation and characterization of Fe3O4@SiO2@MTX@Lipid nanoparticles as a controlled drug-delivery system   Order a copy of this article
    by Nazan Yilmaz, Serpil Edebali, Mehmet Galip Icduygu 
    Abstract: In this study, synthesis and characterization of mesoporous, super magnetic silica structures which have a part as a drug delivery system in controlled release of Methotrexate used in treatment of rheumatoid arthritis were aimed. Within this scope, magnetite nanoparticles were synthesized by coprecipitation method and then surfaces of these nanoparticles were coated fwith mesoporous silica and phospholipid layer. FT-IR, XRD, VSM, BET, TEM, EDX and FESEM analyses were performed for characterization The results of FT-IR analysis showed the existence of silica and lipid layers around magnetite. Fe3O4@SiO2 nanoparticles have a surface area of 576.69 m2/g, a pore size of 8.21 nm and a mesoporous structure. The performed XRD analysis showed that the synthesized Fe3O4 and Fe3O4@SiO2 nanoparticles have cubic spinel structures. In SEM and TEM analyses, the structure of nanoparticles was determined as spherical. As a result of VSM analysis nanoparticles have superparamagnetic characteristic.
    Keywords: MTX; Drug Delivery; Magnetic Silica Nanoparticles.

Special Issue on: 2018 IEEE EDKCON Recent Advances in Nano-Electronic Devices and Technology

  • Analysis of Fly Back Converter Design Using PV based MOSFET Switching
    by Gourab Das 
    Abstract: The Flyback Converters have become one of the most popular used buck-boost topology because of their simple design and working efficiency. In this paper, the dynamic models of the PV based flyback converter design using MOSFET switch have been implemented. This novel design using MOSFET switching technique outperforms the Ideal Switching technique with proofs the superiority of the proposed approach. These models have respective advantages for example single switching, coupled inductor, output filter (capacitive) isolation and operating of these models at a particular value of frequency in a traditional PWM scheme. In the MOSFET Switch Flyback converter the PWM percentage period of Input Output can be increase or decrease. To access apparent parameters, a model is simulated to find the transformer parameters, capacitive parameters, frequency of operation. A simulation model for this purpose in MATLAB/SIMULINK has been devised and then affirmed by running this model on the simulation platform. Also find its various performance matrices with their verification. This paper comprises of the comparison of flyback converter with other DC-DC converters by analyzing the working of the flyback converter. Now-a-days, smaller-sized, high efficient DC-DC converters are having a wide range of applications in power electronics devices. Sometimes, they are used as converting unit, and sometimes as regulating unit. The developed power electronics DC-DC converters are capable of maximizing energy as well as efficiency of the energy conversion system. Some of these converters are analyzed here along with the flyback converter and found with some of their demerits which can be compensated by using flyback converter. The flyback converter can be used as both AC-DC and DC-DC converters. It is basically a Buck-Boost converter, in which the voltage ratios are being multiplied, which is done by splitting the inductor, used in converter, into two to work as a transformer. The voltage ratios can be enhanced by modifying the duty cycle of the switch used in this converter.
    Keywords: Pulse Width Modulation (PWM),Flyback Converter,MOSFET,AC-DC Converter

Special Issue on: 2018 IEEE EDKCON Recent Advances in Nano-Electronic Devices and Technology

  • Simple tuning of modified Smith predictor for unstable FOPTD processes   Order a copy of this article
    by Somak Karan, Chanchal Dey 
    Abstract: A simple tuning for modified Smith predictor is reported here to control unstable first-order plus time delay (FOPTD) processes. In practice, a good number of chemical processes (like combustion, evaporation, distillation etc.) are unstable as well as delay dominated in nature. Modified Smith predictor technique is a well-accepted methodology for its simplicity and efficacy to regulate delay dominated processes to ascertain desirable closed-loop response. 2-DOF (two-degree-of-freedom) control scheme of the proposed multi-loop controller provides performance enhancement during both set point tracking and load recovery phases. To mitigate tuning complexity of more than one controller involved in modified Smith predictor, the proposed simple guideline involves the same set of tuning parameters for all three controllers. Distinctive feature of the proposed tuning scheme is that there is no overshoot during set point tracking as well as smooth and improved recovery is observed subsequent to uncertain load changes. Superiority of the proposed methodology is established through performance evaluation and stability analysis with well accepted modified Smith predictor based tuning relations.
    Keywords: Large dead time process; dead time compensator; modified Smith predictor; unstable first-order plus time delay (FOPDT) process; two-degree-of–freedom (2-DOF) structure.

  • Systematic Design Strategy for DPL-based Ternary Logic Circuit   Order a copy of this article
    by ALOKE SAHA, Narendra Deo Singh 
    Abstract: This work proposes novel strategy to design 2-input Ternary (Base-3) logic circuits using Double Pass-transistor Logic (DPL). The concept has been explored with respect to 2-input TXOR gate. The circuit diagram for TXOR, TAND and TOR logic gate based on proposed idea is presented. The proposed T-Cells are designed and optimized using BSIM3 device model with 1.8V supply rail and at 25
    Keywords: Double Pass-transistor Logic (DPL); Hot-spot; Ternary (Base-3) System; Wave-pipelining; 2:9 Ternary Decoder.

  • Modulation of Millimeter-Wave and THz Properties of IMPATT Sources via External Magnetic Field   Order a copy of this article
    by Partha Banerjee, Aritra Aharyya, Arindam Biswas, A.K. Bhattacharjee 
    Abstract: The modulation of millimeter-wave (mm-wave) and terahertz (THz) properties of impact avalanche transit time (IMPATT) sources under external steady magnetic field has been studied in this paper. The arrangement of magnetic field tuning of IMPATT oscillators by using external transverse steady magnetic field is referred to as magnetic field tunable avalanche transit time (MAGTATT) oscillators. The sensitivities of various static, large-signal and noise characteristics of Silicon based MAGTATT sources operating at mm-wave atmospheric window frequencies (94, 140 and 220 GHz) and two different THz frequencies (0.3 and 0.5 THz) have been studied. Comprehensive two-dimensional simulation models developed by the authors for evaluating static, large-signal and noise characteristics of MATATT diodes have been used for this purpose. The simulation results show that the above-mentioned magnetic field sensitivities of the device properties are significantly reduced with the increase of the operating frequency.
    Keywords: Atmospheric window frequency; MAGTATT; sensitivity analysis; THz.

  • Hardware Realization of an Intelligent Medical Image Watermarking   Order a copy of this article
    by Sandeep Bal, Sanjay Das, Soumadeb Dutta, Souma Das, Debamita Biswas, Abhishek Basu 
    Abstract: Digital intelligence features the competence to transmit medical image at swifter measure with a substantially superior computing relaxation. Hindrance to this is the up rise of copyright transgression problems. Medical image watermarking primarily focusses on embedding of the watermark in a concerned medical pictorial. The writers have concerned on the realm of Intelligent Medical Image Watermarking. Medicative images like USG, CT-Scan, MRI and X-rays are utilized. The intelligent binary mask used is primarily sectioned according to a fixed ratio and in accordance with a predefined intelligent schematic, the watermark bits are hidden in only a part of the sections to prevent distortion of the information pixels in the medical image. The entrenchment and excerpting epistemologies have been operationalized utilizing FPGA. The image testing parameter outcomes are discernibly persistent. Furthermore, an analogy of the proposed approach against few germane methods ensures the supremacy of the technique put forward.
    Keywords: Copyright Transgression; Medical Image Watermarking; Intelligent; Fixed ratio; FPGA.

  • Comparative performance analysis of FPGA based MAC unit using non-conventional number system in TVL domain for signal processing algorithm   Order a copy of this article
    by ANIRUDDHA GHOSH, Amitabha Sinha 
    Abstract: Today, the complication of binary digital hardware system is progressively growing. Due to this fact, new methodologies for efficiently describing and realizing the digital systems are explored in this paper. Multi valued logic methodology offers a few preferences over existing binary digital system. One of the well-known multivalued logic systems is Ternary Value Logic (TVL) System. Ternary system has a few essential points of interest over binary system. It is seen that all kind of Digital Signal Processing (DSP) algorithms widely use Multiply-Accumulate (MAC) operation for superior digital processing system. The multiplication and accumulation operations together can be performed by the MAC unit to avoid excessive overhead on the processor in terms of processing time and the on-chip memory consumptions. To implement high performance DSP algorithms MAC unit is used extensively. In current scenario, it is seen that non-conventional, non-binary number system-based architecture is also exhibited better performance. The example of such non-conventional, non-binary number systems are Ternary Residue Number Systems (TRNS) and Double Base Ternary Number System (DBTNS). In this paper a comparative study is made on performance analysis of MAC unit using various non-conventional, non-binary number system. All the architecture is mapped on field programmable gate array (FPGA) for analysis its performance.
    Keywords: Ternary Value Logic (TVL); Ternary Residue Number Systems (TRNS); TRNS Adder; Double Base Ternary Number Systems (DBTNS); DBTNS Multiplier; Multiply and Accumulate Unit (MAC); FPGA; DSP Algorithms.

  • Development of a Visible Light Communication System for reducing flicker in low data rate requirement   Order a copy of this article
    by SUJIT CHATTERJEE, BANTY TIRU 
    Abstract: For an efficient communication system, it is essential to remove each of the associated problems. In case of visible light communication (VLC) the illumination as well as transmission of data is done using the same light source. In this paper, the problem of flicker is dealt with, that occur at very low bit rates of the order of few bits per second (bps) and a health hazard. An experimental setup is developed to deal with flicker using frequency shift keying (FSK) to obtain a workable VLC system that is much more efficient than the commonly used on-off keying (OOK). The efficiency of the system in terms of distance between the transceivers, bit error rate (BER), bit rate and angle of coverage is found out. Using the arrangement, a flicker free transmission is obtained using a combination of light emitting diode (LED) and photodiode upto bit rates as low as 60 bps which is 62% lower than OOK. A decrease of BER by 86.8% and 85.3% compared to OOK is obtained at a distance of 30cm and 480cm respectively. The arrangement showed a better angular coverage than OOK. For FSK, a 10% increase in BER is found at an angle of 30 which shows considerable improvement over OOK, as the later showed the same error only at 10 (measured at 100 cm). The experimental arrangement is described in detail that would enable replication of the setup in low bit rate requirements.
    Keywords: visible light communication; light emitting diode; photodiode; frequency shift keying; on off keying.

  • A Comparative Analysis of the Short-Channel Effects of Double-Gate, Tri-Gate and Gate-All-Around MOSFETs   Order a copy of this article
    by Shankaranand Jha, Santosh Kumar Choudhary 
    Abstract: The electrical characteristics of metal-oxide semiconductor field-effect transistors (MOSFETs) deteriorate with the scaling of device dimensions. To further the miniaturization and to have more control over the channel, one of the promising solutions is the Multi-gate (MG) architecture of MOSFET. In the present work we have investigated various MG devices like Double-gate (DG), Tri-gate (TG) and Gate-All-Around (GAA) MOSFETs by varying their physical parameters and have compared the associated short-channel effects (SCEs). For a specific SCE, a common mathematical expression has been used for all the MOSFET architectures. The analytical results have been found to be in reasonable agreement with the simulated/fabricated devices.
    Keywords: Multi-gate (MG); Double-gate (DG); Tri-gate (TG); Gate-All-Around (GAA); MOSFET; short-channel effects; quantum mechanical effect.

  • Optoelectronic Properties of Multiple Quantum Barriers Nano-Scale Avalanche Photo Diodes   Order a copy of this article
    by Somrita Ghosh, Arindam Biswas, Aritra Acharyya 
    Abstract: The important optoelectronic properties like spectral response, excess noise characteristics, time and frequency response of multiple quantum barrier (MQB) nano-scale avalanche photodiodes (APDs) based on Si~3C-SiC material system have been studied in this paper. A self-consistent simulation method based on quantum drift-diffusion (SCQDD) model has been presented. Simulation results show that the Si~3C-SiC MQB nano-APDs are capable of detecting significantly longer wavelengths (up to 4000 nm) as compared to infrared flat Si APDs. The multiplication gain and excess noise factor (ENF) of the MQB APDs have been calculated by varying the number of quantum barriers (QBs). The numerically calculated ENF values of MQB APDs have been compared with the ENF of Si flat conventional APDs of similar dimensions and it is observed that the use of QBs leads to significant reduction in ENF of the APDs under similar biasing and illumination conditions. A very narrow rectangular pulse of pulse-width of 0.4 ps has been used as the input optical pulse having 850 nm wavelength incident on the p+-side of the MQB APD structures and corresponding current responses have been calculated by using a simulation method developed by the authors; finally the frequency responses of the devices are obtained via the Fourier transform of the corresponding pulse current responses in time domain. Simulation results show that MQB nano-APDs possess significantly faster time response and wider frequency response as compared to the flat Si nano-APDs under similar operating conditions.
    Keywords: Avalanche photodiode; multiple quantum barrier; photocurrent; quantum well; spectral response; excess noise; time and frequency response.

  • A COMPARATIVE STUDY ON THE EFFECTS OF TECHNOLOGY NODES AND LOGIC STYLES FOR LOW POWER HIGH SPEED VLSI APPLICATIONS   Order a copy of this article
    by INAMUL HUSSAIN, Saurabh Chaudhury 
    Abstract: As CMOS technology is scaled down, it faces critical challenges such as power dissipation, leakages,process related limitations, short channel effects, etc. The Carbon Nanotubes(CN) Field Effect Transistor (CNTFET) is a possible alternative to CMOS technology. MOSFET like CNTFETs has many advantages over conventional MOSFETs and are best for future VLSI applications. In this work, a comparative study has been carried out on the effects of technology nodes and logic styles on power dissipation, delay, leakages, etc. The technology nodes that are considered here are 90cm Bulk-Si MOSFET technology, 32nm Bulk-Si MOSFET technology and 32nm CNTFET technology. The logic families considered here are the conventional Complementary Metal Oxide Semiconductor (CMOS), Complementary Pass transistor Logic (CPL) and Transmission Gate (TG) logics. To study the effect of technology nodes on leakage, power and delay, the digital circuits considered are NAND, NOR, XOR and MUX gates. A simulation has been carried out at Synopsys HSPICE tool with the mentioned technology nodes to calculate the worst case delay, total power consumption and power delay product (PDP). This work provides the best choice of technology node and logic style for low-power, high-speed VLSI applications. It is observed that at 32nm CNTFET technology, the least power, delay and PDP are observed as 15.5nW, 3.11ps and 0.048aJ respectively. Best on performances, it is seen that CNTFET based logics are superior compared to other logic families at different technology nodes.
    Keywords: Logic Styles; Technology; CMOS; CPL; TG; CNTFET; PDP.

  • A Simple Method for Study of Effect of Kerr Nonlinearity on Effective Core Area, Index of Refraction and Fractional Modal Power through the Core of Monomode Graded Index Fiber   Order a copy of this article
    by ANUP KUMAR MAITI 
    Abstract: Using the simple power series expression for fundamental modal field derived by Chebyshev technique, we present investigation of some important propagation parameters like effective core area, index of refraction and fractional modal power guided through the core of single mode graded index fiber in presence of Kerr nonlinearity. In absence of nonlinearity, the said power series expression leads to prescription of analytical expressions of the concerned propagation parameters. Employing those analytical expressions, we apply iterative method in order to evaluate the said parameters in presence of Kerr nonlinearity. Choosing some typical single-mode step and parabolic index fibers for our study, we verify that the results obtained by our simple formalism match excellently with the exact results which are obtainable by applying rigorous finite element technique. This excellent agreement attests to the accuracy of our formalism. Further, our formalism requires little computation in the context of evaluation of the said parameters. Accordingly, our formalism can be considered as a simple but accurate alternative to the existing complicated methods available in literature. Thus this user friendly but accurate formalism will benefit the system engineers in respect of selection of suitable fiber in which modal noise due to nonlinearity is minimum.
    Keywords: Graded index fiber; cladding decay parameter; V number; effective core area; index of refraction; Confinement of modal power; Chebyshev technique; Kerr nonlinearity.

  • Development of a Highway Driving Events Identification and Classification using Smartphone   Order a copy of this article
    by Munaf Al-Din 
    Abstract: The emergence of new vehicular applications such as driving monitoring systems, driving behavior and style analysis, driving intension modelling and vehicle telematics, have greatly contributed to the developments of road safety analysis, intelligent transportation systems and microscopic traffic simulation for smart cities. Identification and classification of driving events represents a fundamental necessity for all these systems and in fact they represent the backbone module for any successful application. In recent years, the use of smartphones has grown significantly due to the increase in their computational capabilities and the integration of advanced sensor technologies. This prevalence of smartphones and advances in machine learning techniques have rapidly transformed the field of vehicular applications to be easily accessible, widely available, and implemented at low cost. Nevertheless, the accuracy of these smartphones-based applications critically depends on the calibration and pre-processing techniques that intended to mitigate problems associated smartphones sensors. This study proposes and investigates a set of simple calibration and pre-processing techniques used to enhance the accuracy of a smartphone-based driving event detection and classification system. Furthermore, paper presents a simple and effective approach for the identification and classification of driving events. The approach is based on separating events identification process from the classification process. The Dynamic Time Warping (DTW) technique is used for the identification, while statistical and time metrics features are used for the classification. Results obtained show a high accuracy rate of the proposed system.
    Keywords: Smartphone sensors calibration; Driving events; Detection and Classification techniques.

  • Performance enhancement of double-gate tunnel FETs using dual-metal and graded-channel configuration   Order a copy of this article
    by Chandan Pandey, Saurabh Chaudhury 
    Abstract: In this paper, a novel structure of Tunnel FET device has been proposed with graded-channel and dual-metal structure showing a huge reduction in ambipolar conduction. With the help of two-dimensional numerical simulations, it has been shown that a graded-channel configuration in DG-TFETs with heavily-doped region adjacent to drain terminal changes the alignment of energy band profile of channel and drain region at tunneling interface between them resulting to an increment in tunneling width at same interface. Eventually, a significant reduction in ambipolar conduction has been found in the device. Furthermore, it has also been demonstrated that gate metal with lower work function on drain side along with heavily-doped channel region can suppress the ambipolarity up to a great extent in DG-TFETs. Moreover, it has been shown that the ambipolar conduction can be eliminated in the proposed device even if drain region is doped with same concentration as being used for source.
    Keywords: Ambipolar conduction; graded channel; subthreshold swing; tunneling width; tunneling FETs.

Special Issue on: DevIC 2019 Advanced Nanoscale Devices/MEMS/NEMS for Application in Microsystems

  • Wideband Piezoelectric Energy Harvester design using parallel connection of multiple beams   Order a copy of this article
    by Sourav Naval, Prasun Kumar Sinha, Nikhil Kumar Das, Ashutosh Anand, Sudip Kundu 
    Abstract: Microelectromechanical System (MEMS) based piezoelectric energy harvesters have been successful in harvesting optimum power output from the low-frequency vibrations in the environment. Their ability to operate over a wide range of frequencies is quite essential because the vibrations occurring in the environment are random and occur at different frequencies. In this paper, we try to increase the operating bandwidth of a MEMS-based energy harvester using parallel connection of multiple cantilever beam structures. The operating bandwidth of the energy harvester increases as the number of beams is increased, provided the resonant frequencies of the beams differ from each other by a sufficient margin. Here we consider the operating bandwidth of the energy harvesters to be the range of frequencies over which they generate an output voltage greater than or equal to 1 V. The single beam, parallelly connected two-beam, three-beam and four-beam structures have an operating bandwidth of 26 Hz, 27 Hz, 28 Hz, and 31 Hz, respectively. Thus, the bandwidth of parallelly connected four-beam structure is wider than that of single beam structure by 5 Hz.
    Keywords: MEMS; Piezoelectric Energy Harvesters; Wideband; Multi-beam; COMSOL.

  • Vertically-Stacked Silicon Nanosheet Field Effect Transistors at 3nm Technology Nodes Simulation at Nanoscale   Order a copy of this article
    by Eleena Mohapatra, Taraprasanna Dash, Suprava Dey, Jhansirani Jena, Sanghamitra Das, Chinmay Maiti 
    Abstract: Feasibility of vertically-stacked silicon nanosheet FETs (SNS-FETs) for extreme scaling at 3nm technology node are investigated for the first time as one of the possible solutions to continue to enhance the performances of the CMOS technology. In this work, we use 3-D predictive simulations to study the performance potential of SNS-FETs at 3nm technology node. With the end of happy scaling era, change of device architecture has raised integration complexity along with severe short channel effects, mobility degradation, variability and quantum tunneling leakage. These are the major challenges as device dimensions are scaled for ultimate scaling below 7nm. Towards low power and high speed (More-than-Moore applications), nanowires and nanosheet transistors are being proposed. Today, the possibility of FinFET downscaling is still open and more than ever alternatives to CMOS transistors, such as, vertically-stacked SNS-FETs are showing their potential to surpass FinFETs. Variability due to metal grain granularity (MGG) is critical at 3nm technology nodes, as such, the device threshold voltage variation due to MGG is examined for single nanosheet NS-FET. Finally, we calculate the mean and standard deviation of these parameters to quantify the variability.
    Keywords: Nanosheet FETs (NS-FETs); quantum confinement; technology computer aided design (TCAD); drift diffusion; density-gradient; metal grain granularity.

  • Line outage identification using comparison of bus power mismatch considering PMU outage   Order a copy of this article
    by MEHEBUB ALAM, Shubhrajyoti Kundu, Siddhartha Sankar Thakur, Sumit Banerjee 
    Abstract: In this study, a novel algorithm for line outage identification is developed utilizing the PMU provided phasor angles. For various outage cases the simulated bus power mismatches (SBPM) using bus susceptance matrix of full network are to be stored. As soon as actual outage occurs the bus power mismatches are computed using PMU provided pre outage and post outage phasor angles.The proposed algorithm is based on comparison of simulated bus power mismatches with computed bus power mismatches (CBPM) through L-2 norm minimization approach. Additionally, optimal PMU placement issue is also addressed to ensure the network observability in case of PMU outage. Moreover, random Gaussian noise with zero mean and standard deviation (SD) from 1% to 5% is incorporated in the developed model to reflect the measurement error in real power network. New performance indices namely estimation accuracy excluding critical cases(EAECC ) and estimation accuracy including critical cases (EAICC) is introduced to test the efficiency of the algorithm by comparing with existing methods. Simulation was carried out on standard IEEE 5 bus, 14 bus, 30 bus, 57 bus and 118 bus system to check the viability and applicability of the proposed methodology. The obtained test results are found to be competitive with the existing methods.
    Keywords: Phasor measurement unit (PMU); line outage identification (LOI); optimal PMU placement; noise; power systems.

  • Comparative Analysis of Silicon Nano Tube FET for switching applications using High K and workfunction modulation   Order a copy of this article
    by Avtar Singh, Chandan Kumar Pandey, Saurabh Chaudhury, Chandan Kumar Sarkar 
    Abstract: In this paper we have studied the impact of variation of k dielectric constant and alternation of gate work function on Silicon Nano Tube FET for low power and high speed switching applications. The Silicon Nano tubular structure offers better immunity towards short channel effects (SCEs) because of the better control of channel region due to the double gate all around. Due to the gate engineered structure high K value structures possess high value of electron velocity as compare to low k dielectric structure, which helps in improving the efficiency of carrier transport. In this paper we have considered a Silicon Di-oxide(SiO2), Silicon Nitride(Si3N4), Hafnium Oxide(HfO2), Hafnium Silicate (HfSiO4),Tin oxide (SnO2) and Titanium Oxide (TO2) as a gate dielectric. It is found that when the high k is replaced with SiO2 then the switching performance of the device is enhanced which makes it suitable for the SOC applications. Further by tuning the gate work function of the device we can able to achieve multiple threshold voltages and optimize the performance of the device. Here in this paper we discuss the impact of work function variation on ON-current , OFF- current and threshold voltage . From the analysis it has been found that HFO2 in SINTFET will be a superior alternative for future tubular FET devices and by tuning the gate work function nearby to 4.8 eV the silicon nano tube shows optimized better performance among all other values.
    Keywords: High K.Silicon nano Tube FET ; workfunction modulation; Ion / IOff ratio ,tubular structure.