Efficient mapping of an image processing application for a network-on-chip based implementation Online publication date: Thu, 10-Dec-2009
by Marcus Vinicius Carvalho Da Silva, Nadia Nedjah, Luiza de Macedo Mourelle
International Journal of High Performance Systems Architecture (IJHPSA), Vol. 2, No. 1, 2009
Abstract: Network-on-chip (NoC) is considered the next generation of communication infrastructure, which will be omnipresent in different environments. In the platform-based methodology, an application is implemented by a set of collaborating intellectual properties (IPs) blocks. Increasing scale integration increases the number of possible IPs to be addressed on a NoC platform. In this paper, we propose a multi-objective evolutionary-based mapping of an image processing application on a NoC based platform. The IP mapping is driven by the area occupied, execution time and power consumption.
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