International Journal of High Performance Systems Architecture (IJHPSA) Inderscience Publishers - linking academia, business and industry through research

International Journal of High Performance Systems Architecture

Pages	Title and author(s)
1-15	High speed, low power 100 MS/s front end track-and-hold amplifier for ten-bit pipelined ADC D. Meganathan, Raja Paul Perinbam, R. Deepalakshmi DOI: 10.1504/IJHPSA.2009.030094
16-25	Context-oriented exception handling Fabiane Cristine Dillenburg, Jorge Luis Victoria Barbosa DOI: 10.1504/IJHPSA.2009.030095
26-34	A massively parallel hardware architecture for ray-tracing A.S. Nery, N. Nedjah, F.M.G. Franca DOI: 10.1504/IJHPSA.2009.030096
35-45	Dual channel addition based FFT processor architecture for signal and image processing Subhendu Kumar Sahoo, Chandra Shekhar, Sudeepti Kodali, Abhijit R. Asati, Anu Gupta DOI: 10.1504/IJHPSA.2009.030097
46-57	Efficient mapping of an image processing application for a network-on-chip based implementation Marcus Vinicius Carvalho Da Silva, Nadia Nedjah, Luiza de Macedo Mourelle DOI: 10.1504/IJHPSA.2009.030098
58-67	HieraAnalyses – a tool for hierarchical analysis of parallel programs Thatyana de Faria Piola Seraphim, Enzo Seraphim, Gonzalo Travieso DOI: 10.1504/IJHPSA.2009.030099