Title: Implementation and performance analysis of cascaded multilevel inverter using modified SVPWM techniques

Authors: Ch. Lokeshwar Reddy; P. Satish Kumar; M. Sushama

Addresses: Department Electrical and Electronics Engineering, CVR College of Engineering, Hyderabad 501510, Telangana, India ' Department of Electrical Engineering, University College of Engineering, Osmania University, Hyderabad 500007, Telangana, India ' Department Electrical and Electronics Engineering, College of Engineering, JNT University, Hyderabad 500085, Telangana, India

Abstract: The space vector pulse width modulation (SVPWM), which is considered as an efficient PWM technology can also be used for multilevel inverters. This method is originally designed for two-level inverters. This paper introduces a modified SVPWM technique. The cascaded H-bridge multilevel inverter (CMLI) of 7-level, 9-level and 11-level are simulated for three different carrier PWM techniques. Here, carrier-based sinusoidal pulse width modulation (SPWM), third harmonic injected pulse width modulation (THIPWM), and modified carrier-based SVPWM are used as modulation strategies. These modulation strategies include phase disposition technique (PD), phase opposition disposition technique (POD), Alternate Phase Opposition Disposition technique (APOD), and Phase Shifted Carrier (PSC). These strategies have been implemented by using simulation and validated by experiment. The detailed examination of the simulation results has been presented and validated with experimental results of 11-level CMLI.

Keywords: PDSVPWM; PODSVPWM; APODSVPWM; CMLI; cascaded H-bridge multilevel inverter; THIPWM; third harmonic injected pulse width modulation.

DOI: 10.1504/IJPELEC.2018.093382

International Journal of Power Electronics, 2018 Vol.9 No.3, pp.250 - 273

Received: 28 Feb 2017
Accepted: 04 Jul 2017
Published online: 25 Jul 2018 *

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