Title: A system-level framework for designing and evaluating protocol processor architectures

Authors: Seppo Virtanen, Tero Nurmi, Jani Paakkulainen, Johan Lilius

Addresses: Department of Information Technology, University of Turku, FI 20014 Turku, Finland. ' Department of Information Technology, University of Turku, FI 20014 Turku, Finland. ' Department of Information Technology, University of Turku, FI 20014 Turku, Finland. ' Department of Computer Science, Abo Akademi University, Lemminkaisenkatu 14 A, FI 20520 Turku, Finland

Abstract: To meet the tightening requirements on network hardware, the design of programmable processors with network-optimised hardware, that is, network or protocol processors, has attracted interest. In this paper, we address evaluation of different architectural configurations for such processors, and reuse of previously designed components in later design projects. The proposed system-level framework enables easy and fast experimentation with different protocol processor hardware architecture configurations to estimate their performance characteristics at early stages in the design process. We conclude the paper with examples of designing processors using the framework.

Keywords: design methodology; design space exploration; design verification; component reuse; system-level design; protocol processor architectures; architectural configurations; processor design; simulation; evaluation; hardware-software codesign.

DOI: 10.1504/IJES.2005.008810

International Journal of Embedded Systems, 2005 Vol.1 No.1/2, pp.78 - 90

Published online: 26 Jan 2006 *

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