Title: A minimally intrusive method for analysing the timing of RTEMS core characteristics

Authors: Fernando G. Nicodemos; Osamu Saotome; George Lima; Sandro S. Sato

Addresses: Departamento de Engenharia Mecânica e Aeronáutica – EAM-S, Instituto Tecnológico de Aeronáutica – ITA, Praça Marechal-do-Ar Eduardo Gomes, 50, Vila das Acácias, São José dos Campos, SP, 12.228-900, Brazil ' Departamento de Eletrônica Aplicada – IEEA, Instituto Tecnológico de Aeronáutica – ITA, Praça Marechal-do-Ar Eduardo Gomes, 50, Vila das Acácias, São José dos Campos, SP, 12.228-900, Brazil ' Departamento de Ciência da Computação – DCC, Universidade Federal da Bahia – UFBA, Av. Adhemar de Barros, s/n, Ondina, Salvador, BA, 40.170-110, Brazil ' Departamento de Eletrônica Aplicada – IEEA, Instituto Tecnológico de Aeronáutica – ITA, Praça Marechal-do-Ar Eduardo Gomes, 50, Vila das Acácias, São José dos Campos, SP, 12.228-900, Brazil

Abstract: Verification of software requirements in critical systems should be performed to prove that the design is feasible implying that system designers must account for the real-time behaviour of the execution infrastructure, which includes the real-time operating system (RTOS). In this paper, we describe a new approach for analysing the timing of real-time executive for multiprocessor systems (RTEMS) core characteristics, an RTOS used to support embedded real-time space applications. The described approach is minimally intrusive and hardware-based, meaning that an external tool is plugged onto the system analysed with no need to modify the RTOS internal source code. The developed tool was implemented using a high-performance field-programmable gate array (FPGA). Experiments were carried out taking a satellite on-board computer case study. Real execution timing data collected from the case study indicate the effectiveness of the described approach.

Keywords: real-time operating system; RTOS; real-time executive for multiprocessor systems; RTEMS; embedded systems; critical systems; space embedded processors; dynamic code analysis; minimally intrusive measurement; core performance analysis; field-programmable gate arrays; FPGAs; real-time performance evaluation; software requirements; satellite on-board computers; execution timing data.

DOI: 10.1504/IJES.2016.080382

International Journal of Embedded Systems, 2016 Vol.8 No.5/6, pp.391 - 411

Received: 04 Feb 2014
Accepted: 17 Sep 2014

Published online: 17 Nov 2016 *

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