Title: CMOS oscillator with MOS varactor and body bias tuning

Authors: Manoj Kumar

Addresses: University School of Information and Communication Technology, Guru Gobind Singh Indraprastha University, New Delhi, India

Abstract: In this paper, designs of voltage controlled oscillator (VCO) using three transistors XNOR gates with variable capacitive load have been presented. Three and five stage VCO circuits have been designed using the concept of reverse body bias and variable NMOS load. The tuning of output frequency has been controlled by coarse and fine tuning methods. Coarse tuning has been achieved with the variation in supply voltage from 1.8 V to 3 V and fine tuning has been obtained with variation in reverse bias voltage of NMOS load from 0 V to −0.8 V. A tuning range of 20% and 19% have been obtained with the proposed three and five stages VCO circuits. Results have been obtained for 0.18 µm CMOS technology. Power consumption and output frequency range of proposed VCO circuits have been compared with earlier reported circuits and proposed circuit's shows improved performance.

Keywords: CMOS oscillator; delay cell; low power; MOS variable load; reverse body bias; variable NMOS load; voltage controlled oscillators; VCO design; tuning control; power consumption; output frequency range.

DOI: 10.1504/IJCAD.2016.075912

International Journal of Circuits and Architecture Design, 2016 Vol.2 No.1, pp.68 - 82

Received: 03 Mar 2015
Accepted: 14 Nov 2015
Published online: 12 Apr 2016 *

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