Title: Review of 2D/3D DWT-IDWT VLSI architectures for image compression

Authors: C. Chandrasekhar; S. Narayana Reddy

Addresses: Department of ECE, SVCET, Chittoor, Andhra Pradesh, India ' Department of ECE, S.V. University, Tirupathi, Andhra Pradesh, India

Abstract: With the development in VLSI technology, leading to growth in transistor count on a single chip have led to increase in implementation of complex signal processing algorithms. 3D DWT is a complex algorithm for video coding which is replacing motion estimation and compensation technique. In this paper, a review of various 2D architectures for DWT-IDWT is discussed, complexity measures of 2D DWT architectures for VLSI implementation is presented. A 3D model for DWT-IDWT is developed and is verified for its functionality for video encoding. The simulation results demonstrate the advantages of 3D DWT-IDWT model over 2D for video encoding. The developed model can be used for medical applications.

Keywords: 3D DWT; video coding; MATLAB modelling; 3D WT; hardware modelling; hardware implementation; signal processing; image processing; 2D DWT architectures; motion estimation; simulation; discrete wavelet transforms; inverse DWT; IDWT.

DOI: 10.1504/IJSISE.2014.066596

International Journal of Signal and Imaging Systems Engineering, 2014 Vol.7 No.4, pp.252 - 264

Received: 20 Sep 2011
Accepted: 06 Jun 2012
Published online: 29 Dec 2014 *

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