Review of 2D/3D DWT-IDWT VLSI architectures for image compression
by C. Chandrasekhar; S. Narayana Reddy
International Journal of Signal and Imaging Systems Engineering (IJSISE), Vol. 7, No. 4, 2014

Abstract: With the development in VLSI technology, leading to growth in transistor count on a single chip have led to increase in implementation of complex signal processing algorithms. 3D DWT is a complex algorithm for video coding which is replacing motion estimation and compensation technique. In this paper, a review of various 2D architectures for DWT-IDWT is discussed, complexity measures of 2D DWT architectures for VLSI implementation is presented. A 3D model for DWT-IDWT is developed and is verified for its functionality for video encoding. The simulation results demonstrate the advantages of 3D DWT-IDWT model over 2D for video encoding. The developed model can be used for medical applications.

Online publication date: Mon, 29-Dec-2014

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