Title: Modelling and characterisation of flat-band roll-off behaviours in LaO_x capped high-K/metal-gate NMOSFET with 28 nm CMOS technology

Authors: Wen-Han Hung; Feng-Renn Juang; Yean-Kuen Fang; Tzyy-Ming Cheng

Addresses: VLSI Technology Laboratory, Institute of Microelectronics, Department of Electrical Engineering, National Cheng Kung University, No. 1, University Rd., Tainan 70101, Taiwan ' Department of Electrical Engineering, National Sun Yat-sen University, No.70, Lienhai Rd., Kaohsiung 80424, Taiwan ' VLSI Technology Laboratory, Institute of Microelectronics, Department of Electrical Engineering, National Cheng Kung University, No. 1, University Rd., Tainan 70101, Taiwan ' United Microelectronics Corporation, Advanced Technology Development/Device No. 18, Nanke 2nd Rd., Tainan Science Park, Tainan 74147, Taiwan

Abstract: In this paper, we model and characterise the lanthanum oxide (LaO_x) capping layer induced flat-band voltage (V_FB) roll-off behaviours in a high-K/metal-gate n-MOSFET prepared with a foundry's state of the art 28 nm CMOS technology. As the interface layer EOT down to 1 nm, the V_FB rolling-off caused by the 10 cycles (∼5 Å) and 20 cycles (∼10 Å) ALD LaO_x capping layers are high, up to ∼282-mV and 550-mV, respectively. The significant V_FB rolling-off behaviours were investigated by the measurements of gate C/V, gate I/V and V_FB vs. EOT. The phenomena were modelled and explained comprehensively with a schematic diagram.

Keywords: LaOx; lanthanum oxide; metal gate NMOSFET; flat-band voltage rolling off; ALD; EOT; capping layer; EMF; 28 nm CMOS technology; modelling; flat-band roll-off behaviour; capping layers; high-K gated NMOSFET; nanotechnology.

DOI: 10.1504/IJNT.2014.065129

International Journal of Nanotechnology, 2014 Vol.11 No.12, pp.1039 - 1046

Published online: 06 Feb 2015 *

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