Title: Study on crosstalk fault model and testing for SoC inter-core interconnects

Authors: Yuling Shang; Chunquan Li; Cailin Li; Ming Zhang

Addresses: School of Electronic Engineering and Automation, Guilin University of Electronic Technology, 541004, Guilin, China ' School of Electromechanical Engineering, Guilin University of Electronic Technology, 541004, Guilin, China ' School of Electromechanical Engineering, Guilin University of Electronic Technology, 541004, Guilin, China ' School of Electromechanical Engineering, Guilin University of Electronic Technology, 541004, Guilin, China

Abstract: Signal integrity testing for inter-cores in SoC has become an important issue within DSM manufacturing technology and GHz working frequency of VLSI. A new testing method for SoC inter-core interconnects is presented in this paper. Properties and principles are obtained based on analysis of crosstalk characteristics for tri-state and bi-directional interconnects. The reduction algorithm of tri-state and bi-direction interconnect is proposed with the properties and principles above. Primary and secondary factors of crosstalk are analysed based on orthogonal design, and then test vectors for interconnects are generated gradually. Finally experiments are implemented, and simulation results show the effectiveness of this method.

Keywords: system-on-chip; SoC; inter-core interconnects; crosstalk; fault modelling; testing; deep submicron; DSM process technology; orthogonal design; simulation.

DOI: 10.1504/IJMSI.2014.064782

International Journal of Materials and Structural Integrity, 2014 Vol.8 No.1/2/3, pp.147 - 160

Published online: 21 Oct 2014 *

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