Authors: Yoonsuk Choi; Shahram Latifi
Addresses: Department of Electrical and Computer Engineering, University of Nevada, 4505 S. Maryland Parkway, Las Vegas, NV 89154-4026, USA ' Department of Electrical and Computer Engineering, University of Nevada, 4505 S. Maryland Parkway, Las Vegas, NV 89154-4026, USA
Abstract: Since the introduction of the first flash memory in 1984, flash memory has been a very important member of the non-volatile semiconductor memory family due to its advantages, such as high density, low-cost, shock resistance, fast access time, low-power consumption and reliability. Despite the advantages, flash memory is still facing many technical limitations that need to be further studied. Various solutions have been developed to improve the performance of flash memory by overcoming the technical limitations; however, flash translation layer has a great impact on the overall performance improvement due to its cost-efficiency and usefulness. In this paper, three main aspects of flash memory are discussed from a perspective of flash translation layer. First, we discuss and classify flash translation layer based on the mapping method. Second, we discuss the current technical limitations that flash memory is facing and how these can be overcome by adopting flash translation layer. Third, we investigate the latest flash translation layer schemes that have been recently studied and proposed, and analyse their advantages and drawbacks.
Keywords: block-level; flash translation layer; FTL; hybrid-level; page-level; flash memory.
International Journal of High Performance Systems Architecture, 2013 Vol.4 No.3, pp.167 - 182
Available online: 23 Jul 2013 *Full-text access for editors Access for subscribers Purchase this article Comment on this article