Title: Critical analysis of cache memory performance concerning miss rate and power consumption

Authors: Hetal V. Dave; Nirali A. Kotak

Addresses: Gujarat Technological University, Ahmedabad, India ' Department of Electronics and Communication Engineering, L.D. College of Engineering, Ahmedabad, India

Abstract: There has been constant growth in the usage of mobile devices in the last decade. As necessary demand by the technological marketplace, mobile devices are designed per the required performance, low power and cost. The memory subsystem is essential in deciding an embedded system's performance, cost and power budget. An analysis of cache memory parameters plays a vital role in choosing the best cache, so here it is aimed to compare different cache memory parameters. This paper conducts a critical analysis of the L1 data cache memory. An analysis of cache size, block size and associativity effect on miss rate is carried out using the Simple Scalar tool. The CACTI tool also found the relationship between power and different cache size. This work will be helpful for further understanding their effect of them on performance and selecting the suitable cache memory configuration through design space exploration (DSE).

Keywords: cache memory; configuration parameter; L1 data cache; miss rate; power consumption.

DOI: 10.1504/IJES.2022.129810

International Journal of Embedded Systems, 2022 Vol.15 No.6, pp.516 - 524

Received: 22 Aug 2022
Received in revised form: 10 Jan 2023
Accepted: 19 Jan 2023

Published online: 30 Mar 2023 *

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