Article: Laius: an energy-efficient FPGA CNN accelerator with the support of a fixed-point training framework Journal: International Journal of Computational Science and Engineering (IJCSE) 2020 Vol.21 No.3 pp.418 - 428 Abstract: With the development of convolutional neural networks (CNNs), their high computational complexity and energy consumption become significant problems. Many CNN inference accelerators are proposed to reduce the consumption. Most of them are based on 32-bit float-point matrix multiplication, where the data precision is over-provisioned. This paper presents Laius, an 8-bit fixed-point LeNet inference engine implemented on FPGA. To achieve low-precision computation and storage, we introduce our fixed-point training framework called FixCaffe. To economise FPGA resources, we proposed a methodology to find the optimal bit-length for weight and bias in LeNet. We use optimisations of pipelining, tiling, and theoretical analysis to improve the performance. Experiment results show that Laius achieves 44.9 Gops throughputs. Moreover, with only 1% accuracy loss, 8-bit Laius largely reduces 31.43% in delay, 87.01% in LUT consumption, 66.50% in BRAM consumption, 65.11% in DSP consumption and 47.95% in power compared to the 32-bit version with the same structure. Inderscience Publishers - linking academia, business and industry through research

Title: Laius: an energy-efficient FPGA CNN accelerator with the support of a fixed-point training framework

Authors: Zikai Nie; Zhisheng Li; Lei Wang; Shasha Guo; Yu Deng; Rangyu Deng; Qiang Dou

Addresses: National University of Defense Technology, Changsha, China ' National University of Defense Technology, Changsha, China ' National University of Defense Technology, Changsha, China ' National University of Defense Technology, Changsha, China ' National University of Defense Technology, Changsha, China ' National University of Defense Technology, Changsha, China ' National University of Defense Technology, Changsha, China

Abstract: With the development of convolutional neural networks (CNNs), their high computational complexity and energy consumption become significant problems. Many CNN inference accelerators are proposed to reduce the consumption. Most of them are based on 32-bit float-point matrix multiplication, where the data precision is over-provisioned. This paper presents Laius, an 8-bit fixed-point LeNet inference engine implemented on FPGA. To achieve low-precision computation and storage, we introduce our fixed-point training framework called FixCaffe. To economise FPGA resources, we proposed a methodology to find the optimal bit-length for weight and bias in LeNet. We use optimisations of pipelining, tiling, and theoretical analysis to improve the performance. Experiment results show that Laius achieves 44.9 Gops throughputs. Moreover, with only 1% accuracy loss, 8-bit Laius largely reduces 31.43% in delay, 87.01% in LUT consumption, 66.50% in BRAM consumption, 65.11% in DSP consumption and 47.95% in power compared to the 32-bit version with the same structure.

Keywords: CNN accelerator; FPGA; inference engine; fixed-point training; data layout.

DOI: 10.1504/IJCSE.2020.106064

International Journal of Computational Science and Engineering, 2020 Vol.21 No.3, pp.418 - 428

Received: 15 Mar 2018
Accepted: 30 Nov 2018
Published online: 27 Mar 2020 *

Full-text access for editors Full-text access for subscribers Purchase this article Comment on this article

Title: Laius: an energy-efficient FPGA CNN accelerator with the support of a fixed-point training framework

Keep up-to-date