Laius: an energy-efficient FPGA CNN accelerator with the support of a fixed-point training framework
by Zikai Nie; Zhisheng Li; Lei Wang; Shasha Guo; Yu Deng; Rangyu Deng; Qiang Dou
International Journal of Computational Science and Engineering (IJCSE), Vol. 21, No. 3, 2020

Abstract: With the development of convolutional neural networks (CNNs), their high computational complexity and energy consumption become significant problems. Many CNN inference accelerators are proposed to reduce the consumption. Most of them are based on 32-bit float-point matrix multiplication, where the data precision is over-provisioned. This paper presents Laius, an 8-bit fixed-point LeNet inference engine implemented on FPGA. To achieve low-precision computation and storage, we introduce our fixed-point training framework called FixCaffe. To economise FPGA resources, we proposed a methodology to find the optimal bit-length for weight and bias in LeNet. We use optimisations of pipelining, tiling, and theoretical analysis to improve the performance. Experiment results show that Laius achieves 44.9 Gops throughputs. Moreover, with only 1% accuracy loss, 8-bit Laius largely reduces 31.43% in delay, 87.01% in LUT consumption, 66.50% in BRAM consumption, 65.11% in DSP consumption and 47.95% in power compared to the 32-bit version with the same structure.

Online publication date: Fri, 27-Mar-2020

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