Improving real-time of Jailhouse on embedded systems via bank and cache partitioning
by Hubin Yang; Liu Yang; Fengyun Li; Yucong Chen; Rui Zhou; Qingguo Zhou
International Journal of Embedded Systems (IJES), Vol. 16, No. 2, 2023

Abstract: As multi-core architectures become increasingly prevalent in embedded systems, the use of lightweight hypervisor to integrate multiple tasks on a single hardware platform has become increasingly popular. Although this approach can significantly reduce costs while improving system performance, it can cause hardware shared resource contention issues. We propose a virtualisation-based mechanism which mitigates shared memory and cache competition among virtual machines through the implementation of DRAM bank and cache partitioning techniques. The results demonstrate that applying our approach led to an average and maximum latency reduction of 74.49% and 73.59%, respectively, when compared to Jailhouse without partitioning using Cyclictest. Therefore, it is evident that our proposed mechanism effectively improves Jailhouse's real-time performance on multi-core embedded systems.

Online publication date: Wed, 31-Jan-2024

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