Application-specific permutation networks Online publication date: Sat, 03-Jan-2009
by Thorsten Drager, Gerhard P. Fettweis
International Journal of Embedded Systems (IJES), Vol. 3, No. 4, 2008
Abstract: This paper examines some aspects of the usage of applications specific interconnection networks for highly parallel processors. The networks are based on permutations. Hence, group theoretic methods may be applied to systematically find good networks. Three methods are presented in this paper: partial Schreier Trees, reduced stabiliser chains, and scaling. These methods allow optimum performance for the application specific transfers, and offer compromises between performance of the remaining transfers, and the effort for finding the solution. The combination of all three methods is shown in a case study with a permutation network for a 16-fold processor.
Existing subscribers:
Go to Inderscience Online Journals to access the Full Text of this article.
If you are not a subscriber and you just want to read the full contents of this article, buy online access here.Complimentary Subscribers, Editors or Members of the Editorial Board of the International Journal of Embedded Systems (IJES):
Login with your Inderscience username and password:
Want to subscribe?
A subscription gives you complete access to all articles in the current issue, as well as to all articles in the previous three years (where applicable). See our Orders page to subscribe.
If you still need assistance, please email subs@inderscience.com