Chapter 1: Invited Addresses and Tutorials on Signals, Coding,
  Systems and Intelligent Techniques

Title: Dynamically reconfigurable processor for multimedia application

Author(s): Hrvoje Mlinaric, Kresimir Duracic, Mario Kovac

Address: Department of control and Computer Engineering in Automation, Computer systems and processes group, University Zagreb, Faculty of electrical engineering and computing, Zagreb, Croatia | PlayMedia Labs, PlayMedia Video Group, Vrhovcev Vijenac 61, Zagreb Croatia | Department of control and Computer Engineering in Automation, Computer systems and processes group, University Zagreb, Faculty of electrical engineering and computing, Zagreb, Croatia

Reference: 12th International Workshop on Systems, Signals and Image Processing pp. 143 - 146

Abstract/Summary: This paper presents a dynamically reconfigurable processor designed for processing data in multimedia application. The work was done as resource of PhD. Research and years of experience in processor architecture and multimedia audio and video application design. The object of this research is to build a high performance reconfigurable processor providing highly scalable architecture and transparent hardware reconfigurable for the multimedia application such as, video encoding/decoding, audio encoding/decoding, speech encoding/decoding.

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