Authors: Haoxuan Li; Paul De Meulenaere; Siegfried Mercelis; Peter Hellinckx
Addresses: University of Antwerp - Faculty of Applied Engineering, Flanders Make - CoSys-Lab, imec - IDLab Groenenborgerlaan 171, 2020 Antwerp, Belgium ' University of Antwerp - Faculty of Applied Engineering, Flanders Make - CoSys-Lab, Groenenborgerlaan 171, 2020 Antwerp, Belgium ' University of Antwerp - imec, IDLab - Faculty of Applied Engineering, Sint-Pietersvliet 7, 2000, Antwerp, Belgium ' University of Antwerp - imec, IDLab - Faculty of Applied Engineering, Sint-Pietersvliet 7, 2000, Antwerp, Belgium
Abstract: Timing analysis is used to extract the timing properties of a system. Various timing analysis techniques and tools have been developed over the past decades. However, changes in hardware platform and software architecture introduced new challenges in timing analysis techniques. In our research, we aim to develop a hybrid approach to provide safe and precise timing analysis results. In this approach, we will divide the original code into smaller code blocks, and then construct a timing model based on the information acquired by measuring the execution time of every individual block. This process can introduce changes in the software architecture. In this paper, we use a multi-component benchmark to investigate the impact of software architecture on the timing behaviour of a system.
Keywords: WCET; timing analysis; hybrid timing analysis; power window; embedded systems; TACLEBench; COBRA block generator.
International Journal of Grid and Utility Computing, 2019 Vol.10 No.2, pp.132 - 140
Available online: 19 Jan 2019 *Full-text access for editors Access for subscribers Purchase this article Comment on this article