Title: High frequency implementation of cryptographic hash function Keccak-512 on FPGA devices

Authors: Soufiane El Moumni; Mohamed Fettach; Abderrahim Tragha

Addresses: Information Processing Laboratory, Ben M'sik Faculty of Sciences, Hassan II Mohammedia-Casablanca University, BP.7955 Sidi Othmane, Casablanca 20702, Morocco ' Information Processing Laboratory, Ben M'sik Faculty of Sciences, Hassan II Mohammedia-Casablanca University, BP.7955 Sidi Othmane, Casablanca 20702, Morocco ' Information Treatment and Modeling Laboratory, Ben M'sik Faculty of Sciences, Hassan II Mohammedia-Casablanca University, BP.7955 Sidi Othmane, Casablanca 20702, Morocco

Abstract: Cryptographic hash functions have an important role in numerous cryptographic mechanisms like computing digital signatures, checking data integrity, storing passwords and generating random numbers. Due to the cryptanalysis attacks on hash functions, NIST expressed its need to a new resistant hash function by announcing a public competition, this competition made Keccak hash function the new secure hash algorithm SHA-3. This new SHA-3 proved its strengths against recent attacks. However it has to be implemented efficiently in order to keep its resistance. In other words, an efficient FPGA design of hash functions is needed be it increasing frequency, minimising area consumption, or increasing throughput. In this paper we have focused on increasing frequency of the Keccak-512, and we have achieved 401.2 MHz as a maximum frequency, and 9.62 Gbps as a throughput. The proposed design has been implemented in Xilinx Virtex-5 and Virtex-6 FPGA devices and compared to existing FPGA implementations.

Keywords: SHA-3; Keccak; hardware implementation; FPGA; frequency; hash function; cryptographic protocols; computer security.

DOI: 10.1504/IJICS.2018.095299

International Journal of Information and Computer Security, 2018 Vol.10 No.4, pp.361 - 373

Available online: 25 Sep 2018 *

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