Title: Rearranging links: a cost-effective approach to improve the reliability of multistage interconnection networks
Authors: Fathollah Bistouni; Mohsen Jahanshahi
Addresses: Department of Computer Engineering, Central Tehran Branch, Islamic Azad University, Tehran, Iran ' Young Researchers and Elite Club, Central Tehran Branch, Islamic Azad University, Tehran, Iran
Abstract: The use of multiprocessor systems is the main method for providing a high computational power. Multistage interconnection networks (MINs) are widely used to connect processors and memory modules in multiprocessor systems. Therefore, the design of an efficient MIN is an essential requirement for the development of multiprocessor systems. In addition, a critical parameter for any efficient interconnection network is reliability. However, the problem in the way of designing high-reliable interconnection networks is high hardware cost. To solve this problem, contribution of this paper is to propose a new approach to improve the reliability of the MINs, called the rearranging links. The proposed approach is implemented on two common MINs namely extra-stage shuffle-exchange network (SEN+) and augmented shuffle-exchange network (ASEN). Meticulous analysis of terminal reliability proves that the proposed approach is an efficient method to improve the reliability of MINs. In addition, performed cost analysis confirms that utilising it leads to emerge cost-effective MINs.
Keywords: multiprocessor systems; multistage interconnection network; MIN; reliability; cost-effectiveness; reliability block diagrams; RBDs.
International Journal of Internet Technology and Secured Transactions, 2018 Vol.8 No.3, pp.336 - 373
Available online: 20 Jul 2018 *Full-text access for editors Access for subscribers Purchase this article Comment on this article