Title: Multi-task parallel collaborative design based on SoC multi-core architecture

Authors: Xiaofu Zou; Yue Tang; Ying Zuo; Shicheng Zhan

Addresses: School of Automation Science and Electrical Engineering, Beihang University, Beijing, China ' School of Automation Science and Electrical Engineering, Beihang University, Beijing, China ' School of Automation Science and Electrical Engineering, Beihang University, Beijing, China ' Software Development Department, Beijing Shenzhou Feihang Technology Co., Ltd., Beijing, China

Abstract: The high efficiency is demanded in aerospace field. In the design of the control system, adopting single processor can hardly meet the demand of efficiency required. However processor array's hardware size and off-chip bus delay cannot be ignored. In order to solve the above mentioned problems, this paper is intended to study multi-task collaborative parallel design based on multi-core SOC (system on chip). Firstly, multi-core architecture based on SOC is achieved, which includes constructing two MicroBlaze cores, two ARM (advanced RISC machines) cores and designing inter-core communication, as well as designing external data collection and hardware acceleration unit based on FPGA (field programmable gate array). Secondly, collaborative parallel design in missile control system is studied. Finally, a verification platform is developed. By comparing with single core processor, it is proved that the approaches proposed have advantages over enhancing the efficiency.

Keywords: multi-core; system on chip; SoC; multi-task; parallel; field programmable gate array; FPGA; advanced RISC machines; ARM.

DOI: 10.1504/IJSCOM.2018.091608

International Journal of Service and Computing Oriented Manufacturing, 2018 Vol.3 No.2/3, pp.212 - 225

Received: 18 Jul 2017
Accepted: 15 Oct 2017
Published online: 08 May 2018 *

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