Title: Performance metrics on ultra low power polyphase decimation filter using carbon nanotube field effect transistor technology
Authors: N. Mathan; M. Vadivel; S. Jayashri
Addresses: Department of Electronics and Communication Engineering, Sathyabama University, Chennai, India ' Department of Electronics and Telecommunication Engineering, Sathyabama University, Chennai, India ' Adhiparasakthi Engineering College, Melmaruvathur, India
Abstract: Low power consumption and abatement in area are the most pre-eminent criteria to scheme the digital signal processor. Multi-rate signal processing studies digital signal processing systems which include conversion. Filters are the substantial building blocks of DSP. The polyphase filters are the momentous component in crafting of various filter structures. Polyphase structure employs FIR filter that terminates to very efficacious implementation. The polyphase decimation filter is generally built with multipliers, parallel in serial out shift register, serial in parallel out shift register, ripple carry adder, carry lookahead adder and parallel in parallel out shift registers as a delay element. To accomplish the desired results in performance parameters of the multiplier, a potent adder is proposed and embodied in the multiplier. The carbon nanotube field effect transistor (CNTFET) is an ameliorating new device that may trample some of the restraints of a silicon-based MOSFET. The circuits are designed in 32 nm CMOS and CNTFET technology in Synopsys HSpice. Performance parameters such as power, delay and power delay product are assayed and compared in both the technologies.
Keywords: polyphase decimation filter; delay; average power; power delay product; radix-4 multiplier architecture; CNTFET.
International Journal of Computer Aided Engineering and Technology, 2018 Vol.10 No.3, pp.209 - 217
Received: 19 Mar 2016
Accepted: 02 May 2016
Published online: 20 Mar 2018 *