Title: Access-driven cache attack resistant and fast AES implementation

Authors: Yadong Wan; Xinqiang Luo; Yue Qi; Jie He; Qin Wang

Addresses: School of Computer and Communication Engineering, University of Science and Technology Beijing, Beijing 100083, China ' School of Computer and Communication Engineering, University of Science and Technology Beijing, Beijing 100083, China ' School of Computer and Communication Engineering, University of Science and Technology Beijing, Beijing 100083, China ' School of Computer and Communication Engineering, University of Science and Technology Beijing, Beijing 100083, China ' School of Computer and Communication Engineering, University of Science and Technology Beijing, Beijing 100083, China

Abstract: The traditional advanced encryption standard (AES) implementations based on four lookup tables (4-T) of 1 KB size, have high encryption performance, whereas face access-driven cache attack at the same time. In this paper, we present an AES implementation based on one lookup table of 512 B with optimised structure, named 1-T, to improve the access-driven cache attack resistant ability. Furthermore, we optimise the implementation of round function of 1-T to eliminate the speed influence from the shrunken lookup table. The experiment result shows that attack resistant ability of 1-T is much higher than 4-T's under the same cache setting; and encryption time of 1-T is increased by 43.5% and 106.3% than 4-T's on the ARM and the ×86 platform respectively, but storage overhead is only 28% of 4-T's.

Keywords: AES encryption; look up table; access-driven cache attack; WSN.

DOI: 10.1504/IJES.2018.089429

International Journal of Embedded Systems, 2018 Vol.10 No.1, pp.32 - 40

Received: 22 Jan 2015
Accepted: 06 Sep 2015
Published online: 24 Jan 2018 *

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