Title: Energy-efficient hardware/software co-synthesis for a class of applications on reconfigurable SoCs

Authors: Jingzhao Ou, Seonil B. Choi, Viktor K. Prasanna

Addresses: Xilinx, Inc., San Jose, CA, USA. ' Intel, Inc., Chandler, AZ, USA. ' Department of Electrical Engineering, University of Southern California, Los Angeles, CA, USA

Abstract: There are many different ways that an application is executed on a Reconfigurable System-on-a-Chip (RSoC). They can significantly impact the overall system energy dissipation. In this paper, we propose a three-step design process for application synthesis using RSoCs. We develop (a) a performance model to abstract a general class of RSoC architectures for application development, (b) a mathematical formulation of the energy-efficient synthesis problem for a class of applications and (c) a dynamic programming algorithm that minimises the system energy dissipation. Using the proposed design process, reduction in energy dissipation ranging from 41% to 54% is observed in our experiments.

Keywords: energy efficiency; hardware-software cosynthesis; reconfigurable SOC; system-on-chip; synthesis; dynamic programming; energy dissipation; embedded systems; linear pipelines.

DOI: 10.1504/IJES.2005.008811

International Journal of Embedded Systems, 2005 Vol.1 No.1/2, pp.91 - 102

Published online: 26 Jan 2006 *

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