Title: CoreMap: a rapid prototyping environment for distributed reconfigurable systems

Authors: Christophe Bobda

Addresses: Department of Computer Science, Kaiserslautern University of Technology, Gottlieb-Daimler-Strasse 48, 67663 Kaiserslautern, Germany

Abstract: We present two methods for solving the temporal partitioning problem. The first one is an enhancement of the well-known list scheduling method. The enhancement uses the so-called configuration switching to minimise the number of partitions. The second method first uses a three-dimensional spectral placement to position the modules in a three-dimensional vector space. The partitioning is done by picking components along the time-axis in increasing order of the time-coordinates. The Kernighan-Lin (KL) (Kernighan and Lin, 1970; Fiduccia and Mattheyses, 1982; Lengauer, 1990) algorithm with a modified gain function adapted to our need is then used to move the nodes of the graph from one partition to the other to insure an unidirectional partition.

Keywords: reconfigurable computing; temporal partitioning; FPGA; field programmable gate arrays; circuit emulation; rapid prototyping; distributed computing; list scheduling; configuration switching; spectral placement; embedded systems.

DOI: 10.1504/IJES.2005.008809

International Journal of Embedded Systems, 2005 Vol.1 No.1/2, pp.65 - 77

Published online: 26 Jan 2006 *

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