Title: A methodology for validation of microprocessors using symbolic simulation

Authors: Prabhat Mishra, Nikil Dutt, Narayanan Krishnamurthy, Magdy Abadir

Addresses: Department of Computer and Information Science and Engineering, University of Florida, Gainesville FL 32611, USA. ' Center for Embedded Computer Systems, Donald Bren School of Information and Computer Sciences, University of California, Irvine CA 92697, USA. ' Qualcomm, San Diego, CA 92121, USA. ' Freescale Semiconductor, Austin TX 78729, USA

Abstract: Functional validation is one of the most complex and expensive tasks in the current processor design methodology. A significant bottleneck in the validation of processors is the lack of a golden reference model. Thus, many existing approaches employ a bottom-up methodology by using a combination of simulation techniques and formal methods. We present a top-down validation approach using a language-based specification. The specification is used to generate the necessary reference models for processor validation using symbolic simulation. We applied our methodology for property checking as well as equivalence checking of microprocessors.

Keywords: processor validation; symbolic simulation; microprocessors; hardware synthesis; architecture description language; microprocessor design; top-down validation; language-based specification; reference models.

DOI: 10.1504/IJES.2005.008805

International Journal of Embedded Systems, 2005 Vol.1 No.1/2, pp.14 - 22

Published online: 26 Jan 2006 *

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