Title: A simulation-based correlation power analysis attack to FPGA implementation of KASUMI block cipher

Authors: Massoud Masoumi; Sobhan Saie Moghadam

Addresses: Islamshahr Azad University, Islamshahr Branch, P.O. Box 33135-369, Sayad Shirazi Ave., Namaz Sqr., Tehran, Iran ' Islamshahr Azad University, Islamshahr Branch, P.O. Box 33135-369, Sayad Shirazi Ave., Namaz Sqr., Tehran, Iran

Abstract: Correlation power analysis (CPA) is a powerful kind of power analysis attacks that is able to break ciphers using correlation between power consumption of the device and hamming weight of the key-dependent values of the algorithm. This paper describes a successful CPA attack against FPGA implementation of KASUMI, a block cipher used in the confidentiality and integrity algorithms of the 3rd generation partnership program (3GPP) mobile communications which is also very suitable for hardware implementation. The main contribution of this paper is that it presents a simulation-based CPA attack which does not need any experimental setup and leads to considerable saving in time and cost. To the best of our knowledge, there are a few articles that present simulation-based power analysis of block ciphers in detail, and specifically, there is no report about mounting of simulation-based or non-simulation-based power analysis attack against hardware implementation of KASUMI in the open literature.

Keywords: KASUMI block cipher; FPGA implementation; correlation power analysis; CPA.

DOI: 10.1504/IJITST.2017.10008035

International Journal of Internet Technology and Secured Transactions, 2017 Vol.7 No.2, pp.175 - 191

Received: 12 Jan 2017
Accepted: 03 May 2017
Published online: 06 Oct 2017 *

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