Title: Configurable quasi cyclic LDPC decoder for multiple code lengths of WiMAX

Authors: G. Amirtha Gowri; S. Subha Rani

Addresses: Department of Electronics and Communication Engineering, Kumaraguru College of Technology, Coimabtore-641049, India ' Department of Electronics and Communication Engineering, PSG College of Technology, Coimbatore, India

Abstract: In wireless communication, the code parameters should have great flexibility to adapt to varying channel conditions. Hence, there is a need for configurable decoders capable of meeting various service requirements and interference conditions. Therefore, a reconfigurable LDPC decoder has been proposed to support multiple code lengths (19 different code lengths) with code rate 1/2 of IEEE 802.16e WiMAX standard LDPC codes. This paper proposes the architecture of a reconfigurable LDPC decoder with parallel factor equal to 4. The reconfiguration parameters are stored in a ROM to configure the architecture to support different code lengths.

Keywords: low density parity check codes; Min-sum decoding algorithm; configurable data router; IEEE 802.16e WiMax standard; field programmable gate arrays.

DOI: 10.1504/IJICT.2017.086835

International Journal of Information and Communication Technology, 2017 Vol.11 No.3, pp.433 - 444

Received: 12 Apr 2014
Accepted: 09 Dec 2014

Published online: 21 Sep 2017 *

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