Title: Hardware acceleration of de novo genome assembly

Authors: B. Sharat Chandra Varma; Kolin Paul; M. Balakrishnan; Dominique Lavenier

Addresses: Department of Electrical and Electronic Engineering, The University of Hong Kong, Hong Kong ' Department of Computer Science and Engineering, Indian Institute of Technology Delhi, 110016, India ' Department of Computer Science and Engineering, Indian Institute of Technology Delhi, 110016, India ' IRISA/INRIA, 35042 Rennes, France

Abstract: The cost of genome assembly has gone down drastically with the advent of next generation sequencing technologies. These new sequencing technologies produce large amounts of DNA fragments. Software programs are used to construct the genome from these DNA fragments. The assembly programs take significant amount of time to execute. To reduce the execution time, these programs are being parallelised to take advantage of many cores available in present day processor chips. Further, hardware accelerators have been developed which when used along with processors speed up the execution. Velvet is a commonly used software for de novo assembly. We propose a novel method to reduce the overall time of assembly by using FPGAs. In this method, we perform pre-processing of these short reads on FPGAs and process the output using Velvet to reduce the overall time for assembly. We show that using our technique we can get significant speed-ups.

Keywords: FPGA; field programmable gate arrays; next generation sequencing; sequencing assembly; bioinformatics; hardware acceleration; de novo genome assembly; DNA fragments; assembly time.

DOI: 10.1504/IJES.2017.081729

International Journal of Embedded Systems, 2017 Vol.9 No.1, pp.74 - 89

Available online: 21 Jan 2017 *

Full-text access for editors Access for subscribers Purchase this article Comment on this article