Title: A CMOS lock-in amplifier for low-power biomedical applications
Authors: M. Santhanalakshmi
Addresses: Department of Electronics and Communication Engineering, PSG College of Technology, Coimbatore 641004, Tamil Nadu, India
Abstract: An analogue Lock-In Amplifier (LIA) is employed in an optical receiver front end to retrieve signals from an extremely noisy environment. The conventional LIA consists of a current source, Transimpedance Amplifier (TIA), set of active Gm-C filter and Phase Locked Loop (PLL). In this work, a high gain low power TIA making use of Operational Transconductance Amplifier (OTA) is proposed. This structure has a 54% improvement in gain and consumes 8% lesser power compared to replica biasing TIA. The gain boosting circuit in the NMOS current steering charge pump reduces the power consumption by 38% compared to conventional structure. In the modified Phase Frequency Detector (PFD), True Single Phase Clock (TSPC) logic is utilised which consumes 50% lesser power compared to conventional design. So, the low power LIA designed with proposed structures can be used for low power biomedical applications. Simulations are done using Cadence Spectre, GPDK 180 nm technology.
Keywords: CMOS lock-in amplifiers; transimpedance amplifiers; mixers; phase locked loop; CMOS low-power applications; biomedical applications; optical receivers; operational transconductance amplifiers; power consumption; simulation.
International Journal of Biomedical Engineering and Technology, 2016 Vol.20 No.1, pp.12 - 32
Received: 29 Dec 2014
Accepted: 29 Jun 2015
Published online: 11 Jan 2016 *