Authors: Mohammed Kamel Benhaoua; Amit Kumar Singh
Addresses: Department of Computer Science, Faculty of Engineering, University of Oran1, Algeria ' Department of Computer Science, Faculty of Engineering, University of York, UK
Abstract: Multi-processor system-on-chip (MPSoC) has emerged as a solution to address the increased computational requirements of modern applications. The network-on-chip (NoC) has been introduced as a power-efficient and scalable communication infrastructure between processors. One important phase in architectural exploration in NoC-based MPSoC is the communications mapping. Mapping parallelised communications of tasks onto these MPSoCs can be done either by static or dynamic routing. Static communication mapping strategies find the fixed placement of communications like XY routing and hence, these are not suitable to achieve high overall performance. The number of tasks or applications executing in MPSoC platform can exceed the available resources, requiring multi-tasking platform. In this paper, we propose a newly dynamic communications mapping strategy for efficient communication between the PEs of MPSoC, where each PE support multiple tasks and shared memory is used for the communications between the tasks mapped in the same PE. The strategy considers efficient placement of communications in order to optimise the overall performance. Experimental results show that the proposed mapping approach provides significant performance improvements when compared to those using static routing.
Keywords: multi-processor systems-on-chip; MPSoCs; network-on-chip; NoC; heterogeneous architectures; dynamic mapping heuristics; routing algorithm; communications mapping; multi-task platforms.
International Journal of High Performance Systems Architecture, 2015 Vol.5 No.4, pp.240 - 251
Available online: 04 Nov 2015 *Full-text access for editors Access for subscribers Purchase this article Comment on this article