Title: Delay analysis of ultra high speed InAlAs/InGaAs high electron mobility transistor

Authors: Meryleen Mohapatra; Nutan Shukla; A.K. Panda

Addresses: Electronics and Communication Engineering Department, ITER, Siksha 'O' Anusandhan University, Bhubaneswar, Odisha, India ' Electronics and Communication Engineering Department, Centre for Advanced Post Graduate Studies, BPUT, Rourkela, Odisha, India ' Electronics and Communication Engineering Department, National Institute of Science & Technology (NIST), Berhampur, Odisha, India

Abstract: This work deals with the DC, RF and delay analysis of a InAlAs/InGaAs based high electron mobility transistor with different gate lengths viz. 50 nm, 35 nm and 15 nm. A maximum drain current (Idss) of 398 mA/mm is achieved at Vds of 0.4 V for a 15 nm gate length device which is more as compared to 50 nm and 35 nm gate length HEMT with a current of 368 mA/mm, 384 mA/mm respectively. A cutoff frequency (fT) of 1.3 THz is obtained for a 15 nm gate length HEMT while a cutoff frequency of 625 GHz and 1.05 THz has been achieved for a 50 nm and 35 nm gate length devices. A maximum oscillation frequency (fmax) of 1.8 THz has been reported for a 15 nm gate length device where as a fmax of 1.35 THz and 1.58 THz has been obtained for a 50 nm and 35 nm gate length HEMT. For a 50 nm, 35 nm and 15 nm gate length HEMT the transit time obtained is 0.42 psec, 0.3 psec, 0.22 psec respectively.

Keywords: gate lengths; pseudomorphic HEMT; 2DEG; ultra high speed InAlAs; indium aluminium arsenide; ultra high speed InGaAs; indium gallium arsenide; delay analysis; transit time; channel charging time; cutoff frequency; maximum oscillation frequency; high electron mobility transistors.

DOI: 10.1504/IJNBM.2014.069805

International Journal of Nano and Biomaterials, 2014 Vol.5 No.4, pp.206 - 217

Received: 05 Jul 2014
Accepted: 26 Dec 2014

Published online: 12 Jun 2015 *

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