Authors: Benbin Chen; Donghui Guo
Addresses: Department of Electronic Engineering, Xiamen University, Fujian 361005, China ' Department of Electronic Engineering, Xiamen University, Fujian 361005, China; IC Design and IT Research Center of Fujian Province, Fujian 361005, China
Abstract: Because the spatial and temporal locality of program codes, compiler could use heuristics and profile guided prediction to relocate the output of program codes to reduce the cache confliction. In this paper, for improving the average accessing time of memory subsystem by raising the instructions cache hit rate, compiler-assisted Markov parameters tuning (MPT) frequencies prediction techniques for codes relocation are proposed. Different with the traditional schemes that provide the fixed heuristics branch probability (FHBP) to calculate nodes frequencies (NF) for various kinds of programs, the Markov-based heuristics algorithm combining FHBP and parameters tuning techniques in MPT probability matrix is adopted for improving program NF prediction to take advantage of the probability matrix and model the control flow graph (CFG) in function more precision. The MPT model was simulated to illustrate the strengths of accurate expression of the program. Compare with the actual execution results of program with profile coverage tests, the experimental result is better fit to validate its feasibility.
Keywords: Markov parameters; parameter tuning; compiler assisted; cache hit rate; node frequency prediction; code relocation; simulation; cache management; simulation.
International Journal of Internet Protocol Technology, 2014 Vol.8 No.4, pp.190 - 199
Available online: 23 Mar 2015 *Full-text access for editors Access for subscribers Purchase this article Comment on this article