Authors: T. Sunil Kumar Reddy; P. Venkata Krishna; P. Chenna Reddy
Addresses: JNTU, Anantapur, Andhra Pradesh, India ' School of Computing Science and Engineering, VIT University, Vellore – 632014, Tamil Nadu, India ' CSE Department, JNTU, Pulivendula, Andhra Pradesh, India
Abstract: Grid computing is a conglomeration of computer resources which explores, exploits and shares various virtual resources in order to enhance the capabilities of parallel CPU. The issue of the consumption of energy over the grid is pivotal during the workflow scheduling, which is generally estimated considering the criteria of usage of power per device, process or service. This paper postulates a framework called power estimator and reducer for multi-core architecture in grid (PERMA-G), which is a modified and revised version over its predecessor framework of PERMA developed by Rajasekhara Babu et al. (2013), capable of addressing the issues of estimating and reducing power in multi-core processors. PERMA-G proves versatile in estimating the consumption of power and the computation capabilities of various resources for multi-core processor environments based on grid. Through dynamic processes it extracts several complexities involved in the tasks and schedules of computation by a method of workflow leading to reduced power consumption, cost efficacy and contracted execution time in general.
Keywords: grid scheduling; power estimation; power reduction; performance analysis; grid computing; energy consumption; workflow scheduling; multi-core processors.
International Journal of Communication Networks and Distributed Systems, 2015 Vol.14 No.1, pp.74 - 88
Received: 27 Feb 2014
Accepted: 18 Apr 2014
Published online: 21 Jan 2015 *