Title: A description style for automatic hardware synthesis

Authors: Zainalabedin Navabi, John Spillane

Addresses: Electrical and Computer Engineering Department, Northeastern University, 409 Dana Research Center, Boston, Massachusetts 021 15, USA. ' Electrical and Computer Engineering Department, Northeastern University, 409 Dana Research Center, Boston, Massachusetts 021 15, USA

Abstract: A behavioural synthesis subset of VHDL is introduced here. This description style does not imply a fixed architecture, is technology independent, is synthesisable, and it is at a level of abstraction which is convenient for the hardware designers. The description style is presented in the form of a template, and for the allowable constructs of this template corresponding hardware structures are defined.

Keywords: automatic hardware synthesis; description style; hardware description language; VHDL; behavioural synthesis; hardware design.

DOI: 10.1504/IJCAT.1992.062589

International Journal of Computer Applications in Technology, 1992 Vol.5 No.1, pp.43 - 52

Published online: 10 Jun 2014 *

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