Title: Efficient implementation of Sobel edge detection algorithm on CPU, GPU and FPGA

Authors: Marwa Chouchene; Fatma Ezahra Sayadi; Yahia Said; Mohamed Atri; Rached Tourki

Addresses: Faculty of Sciences, Laboratory of Electronics and Microelectronics (E?E), Monastir 5000, Tunisia ' Faculty of Sciences, Laboratory of Electronics and Microelectronics (E?E), Monastir 5000, Tunisia ' Faculty of Sciences, Laboratory of Electronics and Microelectronics (E?E), Monastir 5000, Tunisia ' Faculty of Sciences, Laboratory of Electronics and Microelectronics (E?E), Monastir 5000, Tunisia ' Faculty of Sciences, Laboratory of Electronics and Microelectronics (E?E), Monastir 5000, Tunisia

Abstract: Many applications in image processing have high degrees of inherent parallelism and are thus good candidates for parallel implementation. In fact, programming tools for field programmable gate array (FPGA), SIMD instructions on CPU and a large number of cores on graphic processor unit (GPU) have been developed, but it is still difficult to achieve high performance on these platforms. This paper analyses the distinct features of compute unified device architecture (CUDA) GPU and summarises the general program mode of CUDA. Furthermore, we present three different implementations of Sobel edge detection on CPU, FPGA and GPU. Tested image data are also used in these hardware platforms to compare computational efficiency of CPU, GPU and FPGA.

Keywords: image processing; Sobel filter; parallel implementation; FPGA; field programmable gate arrays; GPU; graphic processor units; CUDA programmation; Sobel edge detection; CPU.

DOI: 10.1504/IJAMC.2014.060506

International Journal of Advanced Media and Communication, 2014 Vol.5 No.2/3, pp.105 - 117

Available online: 17 Apr 2014 *

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