Title: Analysis of conduction mechanism in silicon nitride-based RRAM

Authors: Sunghun Jung; Sungjun Kim; Jeong-Hoon Oh; Kyung-Chang Ryoo; Jong-Ho Lee; Hyungcheol Shin; Byung-Gook Park

Addresses: Inter-University Semiconductor Research Center and School of Electrical Engineering and Computer Science, Seoul National University, San 56-1, Silim-dong, Gawnak-ku, Seoul, 151-742, Korea ' Inter-University Semiconductor Research Center and School of Electrical Engineering and Computer Science, Seoul National University, San 56-1, Silim-dong, Gawnak-ku, Seoul, 151-742, Korea ' DRAM Process Architecture Team, Memory Division, Semiconductor Business, Samsung Electronics Co., Ltd., Nongseo-dong, Giheung-gu, Yongin-si, Gyeonggi-Do, 445-701, Korea ' DRAM Process Architecture Team, Memory Division, Semiconductor Business, Samsung Electronics Co., Ltd., Nongseo-dong, Giheung-gu, Yongin-si, Gyeonggi-Do, 445-701, Korea ' Inter-University Semiconductor Research Center and School of Electrical Engineering and Computer Science, Seoul National University, San 56-1, Silim-dong, Gawnak-ku, Seoul, 151-742, Korea ' Inter-University Semiconductor Research Center and School of Electrical Engineering and Computer Science, Seoul National University, San 56-1, Silim-dong, Gawnak-ku, Seoul, 151-742, Korea ' Inter-University Semiconductor Research Center and School of Electrical Engineering and Computer Science, Seoul National University, San 56-1, Silim-dong, Gawnak-ku, Seoul, 151-742, Korea

Abstract: The conduction mechanism in Ti/Si3N4/p-Si memory stack is described. In order to analyse the conduction mechanism, we have measured the I-V characteristics in voltage sweep mode and performed I-V curve fitting. The temperature dependence in Ti/Si3N4/p-Si stacked cell has also been investigated because we cannot identify the conduction mechanism just based on the I-V curve fitting. From I-V curve fitting and temperature measurement data, we have found that space charge limited conduction (SCLC) model is the most probable mechanism in both high resistance state (HRS) and low resistance state (LRS).

Keywords: RRAM; resistive RAM; random access memory; conduction mechanism; Si3N4; silicon nitride; metal insulator semiconductors; MIS structure; SCLC; space charge limited conduction; temperature dependence; nanoelectronics; nanotechnology; memory stack.

DOI: 10.1504/IJNT.2014.059820

International Journal of Nanotechnology, 2014 Vol.11 No.1/2/3/4, pp.167 - 177

Available online: 13 Mar 2014 *

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