Authors: Tomohiro Okuyama; Fumihiko Ino; Kenichi Hagihara
Addresses: Graduate School of Information Science and Technology, Osaka University, Japan. ' Graduate School of Information Science and Technology, Osaka University, Japan. ' Graduate School of Information Science and Technology, Osaka University, Japan
Abstract: This paper proposes an acceleration method for finding the all-pairs shortest paths (APSPs) using the graphics processing unit (GPU). Our method is based on Harish's iterative algorithm that computes the cost of the single-source shortest path (SSSP) in parallel on the GPU. In addition to this fine-grained parallelism, we exploit the coarse-grained parallelism by using a task parallelisation scheme that associates a task with an SSSP problem. This scheme solves multiple SSSP problems at a time, allowing us to efficiently access graph data by sharing the data between processing elements in the GPU. Furthermore, our fine- and coarse-grained parallelisation leads to a higher parallelism, increasing the efficiency with highly threaded code. As a result, the speedup over the previous SSSP-based implementation ranges from a factor of 2.8 to that of 13, depending on the graph topology. We also show that the overhead of path recording needed after cost computation increases the execution time by 7.7%.
Keywords: graphics processing units; GPU; all-pairs shortest path; APSP; high performance computing; graph algorithm; acceleration; compute unified device architecture; CUDA.
International Journal of High Performance Computing and Networking, 2012 Vol.7 No.2, pp.87 - 98
Published online: 05 Apr 2012 *Full-text access for editors Access for subscribers Purchase this article Comment on this article