Title: Differential power analysis: a serious threat for FPGA security

Authors: Massoud Masoumi

Addresses: Islamshahr Azad University, Islamshahr Branch, P.O. Box: 33135-369, Sayad Shirazi Ave., Namaz Sqr., Tehran, Iran

Abstract: Although cryptosystem designers frequently assume that secret parameters will be manipulated in closed reliable computing environments, Kocher et al. reported in 1998 that microchips leak information correlated with the data handled and introduced a new kind of attacks which were radically different from software and algorithmic attacks. These attacks use leaking or side-channel information, like power consumption data, electromagnetic emanations or computing time to recover the secret key. While FPGAs are becoming increasingly popular for cryptographic applications, there are only a few articles that assess their vulnerability to such attacks. This paper describes the principles of differential power analysis (DPA) attack and also illustrates a practical and successful implementation of this attack against an FPGA implementation of the advanced encryption standard (AES) algorithm. The results obtained in this work clearly demonstrate that DPA is a serious threat against realisation of encryption algorithms on SRAM-based FPGAs without effective countermeasures.

Keywords: side-channel attacks; differential power analysis; FPGA implementation; advanced encryption standard; AES algorithm; cryptography; FPGA vulnerability; power consumption; electromagnetic emanations; computing time; field programmable gate arrays; SRAM; static RAM; random access memory.

DOI: 10.1504/IJITST.2012.045161

International Journal of Internet Technology and Secured Transactions, 2012 Vol.4 No.1, pp.12 - 25

Available online: 26 Jan 2012 *

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