Title: Hardware implementation of pulse mode RBF neural network-based image denoising

Authors: Mohamed Krid; Amir Gargouri; Dorra Sellami Masmoudi

Addresses: Sfax Engineering School, University of Sfax, BP W, 3038 Sfax, Tunisia. ' Sfax Engineering School, University of Sfax, BP W, 3038 Sfax, Tunisia. ' Sfax Engineering School, University of Sfax, BP W, 3038 Sfax, Tunisia

Abstract: In this paper, we propose a very compact implementation of a pulse mode radial basis activation function (RBF). The main idea is to make use of the powerful means of RBF neural networks in function approximation and implement a reconfigurable hardware, achieving different image processing tasks with on-chip learning. The proposed network is applied here as illustration in image denoising, which is a very important step in image processing. The efficiency of the proposed pulse mode RBF neural network in image denoising versus other conventional filtering techniques is demonstrated. Moreover, it has been shown that the best strategy, leading to better learning generalisation performances, is to apply in the learning steps all kinds of noise in a random way. In such a way, generalisation is better with respect to each kind of noise. The corresponding design was implemented on a Virtex II PRO FPGA platform and synthesis results are presented.

Keywords: hardware implementation; pulse mode; radial basis function; RBF neural networks; on-chip learning; image denoising; reconfigurable hardware; image processing.

DOI: 10.1504/IJICA.2011.044567

International Journal of Innovative Computing and Applications, 2011 Vol.3 No.4, pp.188 - 199

Received: 11 Feb 2011
Accepted: 06 Nov 2011
Published online: 21 Mar 2015 *

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