Title: Combined circuit architecture for computing normal basis and Montgomery multiplications over GF(2m)

Authors: Chiou-Yng Lee, Chia-Chen Fan, Erl-Huei Lu

Addresses: Department of Computer Information and Network Engineering, Lunghwa University of Science and Technology, Taoyuan County 33302, Taiwan, ROC. ' Department of Computer Information and Network Engineering, Lunghwa University of Science and Technology, Taoyuan County 33302, Taiwan, ROC. ' Department of Electrical Engineering, Chang Gung University, Taoyuan County 33302, Taiwan, ROC

Abstract: This work presents a novel combined circuit architecture for computing normal basis (NB) and Montgomery multiplications, which is based on a Hankel matrix approach. Analytical results reveal that the proposed multiplier has lower space complexity than existing systolic multipliers. Moreover, by using the combined circuit architecture, the proposed scalable multiplier over the composite fields is also presented. Analytical results reveal that the proposed multiplier has lower space complexity than existing systolic NB and Montgomery multipliers. Moreover, the proposed architecture is regular, modular and locally interconnectable, making it well suited for implementing VLSI.

Keywords: bit-parallel systolic multipliers; Hankel matrix vector; normal basis; Montgomery multiplication; combined circuit architecture; VLSI implementation.

DOI: 10.1504/IJAACS.2011.040988

International Journal of Autonomous and Adaptive Communications Systems, 2011 Vol.4 No.3, pp.291 - 306

Available online: 28 Jun 2011 *

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