Title: A hardware architecture for subtractive clustering

Authors: Marcos Santana Farias, Nadia Nedjah, Luiza De Macedo Mourelle

Addresses: Rua Helio de Almeida, 75, Cidade Universitaria – Ilha do Fundao, Rio de Janeiro, RJ, CEP: 21941-906, Brazil. ' Rua Sao Francisco Xavier, 524, Sala 5145-F, Maracana, Rio de Janeiro, RJ, CEP: 20550-900, Brazil. ' Rua Sao Francisco Xavier, 524, Sala 5145-F, Maracana, Rio de Janeiro, RJ, CEP: 20550-900, Brazil

Abstract: Clustering algorithms are used extensively to organise and categorise abundant data. This paper describes the implementation of subtractive clustering algorithm in hardware. The solution developed in this paper seeks a hardware implementation to automatic and fast identification of cluster centres. This hardware proposed is generic so it can be used in any data classification problems, omnipresent in identification systems.

Keywords: subtractive clustering; reconfigurable hardware; data classification; cluster centres.

DOI: 10.1504/IJHPSA.2011.040469

International Journal of High Performance Systems Architecture, 2011 Vol.3 No.2/3, pp.167 - 173

Received: 17 Mar 2011
Accepted: 19 Mar 2011

Published online: 30 May 2011 *

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