Title: GNLS: a hybrid on-chip communication architecture for SoC designs

Authors: Ling Wang, Chunda Ding, Shenghai Zhong, Jianwen Zhang

Addresses: School of Computer Science and Technology, Harbin Institute of Technology, Harbin 150001, China. ' School of Computer Science and Technology, Harbin Institute of Technology, Harbin 150001, China. ' School of Computer Science and Technology, Harbin Institute of Technology, Harbin 150001, China. ' School of Computer Science and Technology, Harbin Institute of Technology, Harbin 150001, China

Abstract: In this paper, we propose global network local bus (GNLS) communication architecture, where network interface is designed and DMA communication is given. We also study and compare the performance of bus-based and mesh-based with GNLS NoC-based infrastructure by theoretical analysis and simulation. It is shown that NoC-based infrastructure performs better than bus-based one in terms of latency when the number of flits contained in the packets exceeds certain threshold. In addition, GNLS-based infrastructure outperforms mesh-based one under the same condition, which verifies the correctness of the theoretical performance analysis. An example of design is given to show that the proposed architecture has better performance than bus, and Mesh based architecture.

Keywords: network-on-chip; NoC; global network local bus; GNLS; network interface; routers; SoC design; system-on-chip; simulation.

DOI: 10.1504/IJHPSA.2011.040468

International Journal of High Performance Systems Architecture, 2011 Vol.3 No.2/3, pp.157 - 166

Published online: 30 May 2011 *

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