Authors: V. Chandrasekhar, F. Livingston, J.R. Cavallaro
Addresses: National Instruments, Austin, TX, USA. ' Texas Instruments, Burlington, MA, USA. ' Department of Electrical and Computer Engineering, Rice University, Houston, TX, USA
Abstract: Reduction of the power consumption in portable wireless receivers is important for cellular systems, including UMTS and IMT2000. This paper explores the architectural design-space and methodologies for reducing the dynamic power dissipation in the Direct Sequence Code Division Multiple Access (DS-CDMA) downlink RAKE receiver. At the algorithm level, we investigate the tradeoffs of reduced precision and arithmetic complexity on the receiver performance. We then present and analyse two architectures for implementing the reference and reduced complexity receivers, with respect to dynamic power dissipation. The combined effect of reduced precision and complexity reduction leads to a 37.44% power savings.
Keywords: DS-CDMA RAKE receiver; VLSI architectures; mobile receivers; mobile communications; power reduction; portable wireless receivers; dynamic power dissipation; direct sequence code division multiple access; receiver performance.
International Journal of Embedded Systems, 2008 Vol.3 No.3, pp.128 - 140
Available online: 14 Sep 2008 *Full-text access for editors Access for subscribers Purchase this article Comment on this article